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Santa Clara, CA; Mountain View, CA; Hillsboro, OR; Austin, TX; Redmond, WA
Source: Microsoft careers · View original posting
From Microsoft's posting. “We” and “our” refer to the employer.
Overview
Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability
solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide.
#azurehwjobs
#SCHIE
This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C.
1324b(a)(3)) for assessment of eligibility to access the export- controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.
Preferred Qualification s
10+ years of experience in pre-silicon validation with a proven track record of delivering high performance Network switches/accelerators, Central Processing Unit (CPU), Vector processors and Graphics Processing Unit (GPU’s) or relevant experience.
Experience in UVM/C verification methodology
Knowledge of Ethernet, TCP/IP, ROCEv2, MAC/PCS, Networking NIC/Switches.
Proven track record with the definition and development of complex SoCs. In depth understanding of processors and peripheral interconnect bus protocols and architectures proficiency in Verilog, System Verilog, and UVM based testbench environment.
Experience building UVM testbenches, managing regressions, meeting code coverage and functional coverage goals to successful tapeout.
#azurehwjobs
#SCHIE
Silicon Engineering IC5 - The typical base pay range for this role across the U.S. is USD $142,800 - $274,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: https://careers.microsoft.com/us/en/us-corporate-pay
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable
LAYIQ is an independent job-discovery service. This listing does not imply a partnership with or endorsement by the employer. Review the original posting for current details and availability.
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